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(parent: ace4275) | patch
am33xx: Correct gpmc_cfg->irqstatus/enable
authorTom Rini <trini@ti.com>
Thu, 18 Jul 2013 19:13:02 +0000 (15:13 -0400)
committerTom Rini <trini@ti.com>
Tue, 30 Jul 2013 13:21:41 +0000 (09:21 -0400)
commit392bba4ad0049832f50eb368a04992f9719744b0
tree6379459fe781ebbd3e3ed8ff2297f5e724d6678atree | snapshot
parentace4275eb33b7833d96fa2db02d253e06cc1a734commit | diff
am33xx: Correct gpmc_cfg->irqstatus/enable

Based on our usage of the GPMC, either with NOR or NAND we do not need
to be setting the irqstatus or irqenable bits and should clear them like
we have historically.

Signed-off-by: Tom Rini <trini@ti.com>
arch/arm/cpu/armv7/am33xx/mem.c diff | blob | history
Domain: System / Kernel;