cxl/port: Move dport tracking to an xarray
authorDan Williams <dan.j.williams@intel.com>
Sat, 28 May 2022 03:51:19 +0000 (20:51 -0700)
committerDan Williams <dan.j.williams@intel.com>
Fri, 22 Jul 2022 00:19:24 +0000 (17:19 -0700)
commit391785859e7e6521f622ad8c965c9792767023bc
treeebbdac616cd6b926d65dccbb3357e5b89091e4ad
parent256d0e9ee4f2f14d30b93fd593cef3108b0527ca
cxl/port: Move dport tracking to an xarray

Reduce the complexity and the overhead of walking the topology to
determine endpoint connectivity to root decoder interleave
configurations.

Note that cxl_detach_ep(), after it determines that the last @ep has
departed and decides to delete the port, now needs to walk the dport
array with the device_lock() held to remove entries. Previously
list_splice_init() could be used atomically delete all dport entries at
once and then perform entry tear down outside the lock. There is no
list_splice_init() equivalent for the xarray.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/165784331647.1758207.6345820282285119339.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/core/hdm.c
drivers/cxl/core/port.c
drivers/cxl/cxl.h