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(parent: 67a82db) | patch
gpu: host1x: Restrict IOVA space to DMA mask
authorThierry Reding <treding@nvidia.com>
Fri, 1 Feb 2019 13:28:27 +0000 (14:28 +0100)
committerThierry Reding <treding@nvidia.com>
Thu, 7 Feb 2019 17:28:57 +0000 (18:28 +0100)
commit38fabcc953883741313d707a919326f77c2d7214
treec05dab3f17eb6ab2a05cdb3645ed6d99ff9703f4tree | snapshot
parent67a82dbc0a374df7a348cc8fb28982945035bd25commit | diff
gpu: host1x: Restrict IOVA space to DMA mask

On Tegra186 and later, the ARM SMMU provides an input address space that
is 48 bits wide. However, memory clients can only address up to 40 bits.
If the geometry is used as-is, allocations of IOVA space can end up in a
region that is not addressable by the memory clients.

To fix this, restrict the IOVA space to the DMA mask of the host1x
device.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/host1x/dev.c diff | blob | history
Domain: System / Kernel;