[SelectionDAG] Add support for vector demandedelts in ADD/SUB opcodes
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 10 Nov 2016 22:41:49 +0000 (22:41 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 10 Nov 2016 22:41:49 +0000 (22:41 +0000)
commit38f0045cb03431fcf3fe59a5942ad74cc6b0ee27
treea8bea1b1b9afe092dd6173e04933ed26eccab323
parentea27ef69699ef54034a300230a0a038de04853df
[SelectionDAG] Add support for vector demandedelts in ADD/SUB opcodes

llvm-svn: 286516
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/X86/known-bits-vector.ll