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(parent: d25cbd3) | patch
clk: imx8mn: remove SYS PLL 1/2 clock gates
authorPeng Fan <peng.fan@nxp.com>
Fri, 25 Feb 2022 08:17:32 +0000 (16:17 +0800)
committerAbel Vesa <abel.vesa@nxp.com>
Fri, 4 Mar 2022 15:06:29 +0000 (17:06 +0200)
commit38ce00adc16319544c8c56edd36324d2c1b98a50
tree509d1699a6b06b9cd4f966dff59443b45f77369ctree | snapshot
parentd25cbd3e392730f459f1fbf5f959c16b460a59cacommit | diff
clk: imx8mn: remove SYS PLL 1/2 clock gates

Remove the PLL 1/2 gates as it make AMP clock management harder without
obvious benifit.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220225081733.2294166-3-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
drivers/clk/imx/clk-imx8mn.c diff | blob | history
Domain: System / Kernel;