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(parent: d6e1e35) | patch
[RISCV] Add tests to demonstrate bitcasted fneg/fabs dagcombines
authorAlex Bradbury <asb@lowrisc.org>
Fri, 25 Jan 2019 14:33:08 +0000 (14:33 +0000)
committerAlex Bradbury <asb@lowrisc.org>
Fri, 25 Jan 2019 14:33:08 +0000 (14:33 +0000)
commit38c4ec31cb80703ffdc411fa3ea6871b54d13bb2
treea4eab3f09eea92825884be3977fb1ec4e5b2edf4tree | snapshot
parentd6e1e3569ca0fe5cdd0d05849ae9bc9a5e196584commit | diff
[RISCV] Add tests to demonstrate bitcasted fneg/fabs dagcombines

This target-independent code won't trigger for cases such as RV32FD where
custom SelectionDAG nodes are generated. These new tests demonstrate such
cases. Additionally, float-arith.ll was updated so that fneg.s, fsgnjn.s, and
fabs.s selection patterns are actually exercised.

llvm-svn: 352199
llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/float-arith.ll diff | blob | history
llvm/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll [new file with mode: 0644] blob
Domain: System / Toolchain;