drm/amd/display: Correct DML calculation to follow HW SPEC
authorPaul Hsieh <Paul.Hsieh@amd.com>
Wed, 22 Mar 2023 09:46:31 +0000 (17:46 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 11 Apr 2023 22:03:35 +0000 (18:03 -0400)
commit385c3e4c29e1d4ce8f68687a8c84621e4c0e0416
tree953755c724763a3a78c5310b818846be3a3ea141
parent6f6869dcf415f7c222057a3f07c23667e1758585
drm/amd/display: Correct DML calculation to follow HW SPEC

[Why]
In 2560x1600@240p eDP panel, driver use lowest voltage level
to play 1080p video cause underflow. According to HW SPEC,
the senario should use high voltage level.

[How]
ChromaPre value is zero when bandwidth validation.
Correct ChromaPre calculation.

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Paul Hsieh <Paul.Hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c