drm/i915: Allow /2 CD2X divider on gen11+
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 30 Aug 2019 00:48:28 +0000 (17:48 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Fri, 30 Aug 2019 22:43:19 +0000 (15:43 -0700)
commit385ba629aa1cdca5373c1fdbf6693ade5062ad27
tree4d8dc396138e94ef458ffb61583ddce5c6b84826
parent7bff9779d76917adfa7c67712aa6ae3b7e5098ba
drm/i915: Allow /2 CD2X divider on gen11+

The bspec has just recently been updated with new cdclk values that
require the use of a /2 CD2X divider rather than a /1 divider.  Once we
add the divider selection logic to ICL+ cdclk programming, we have
pretty much the same logic we were already using on CNL, so it's simpler
to drop icl_set_cdclk() completely and reuse cnl_set_cdclk() on gen11+
platforms as well.

v2:
 - Using ICL_CDCLK_CD2X_PIPE_NONE + BXT_CDCLK_CD2X_PIPE(pipe) for TGL is
   correct, but looks really confusing.  Add some TGL_ macros that alias
   these to avoid confusion.  (Ville)
 - Use DIV_ROUND_CLOSEST rather than / when applying the divider. (Ville)

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190830004828.19359-1-matthew.d.roper@intel.com
drivers/gpu/drm/i915/display/intel_cdclk.c
drivers/gpu/drm/i915/i915_reg.h