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ARM: dts: qcom: sdx55: Add support for A7 PLL clock
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thu, 8 Apr 2021 17:04:43 +0000 (22:34 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 14 Apr 2021 02:06:15 +0000 (21:06 -0500)
commit37f0f245f92a1fbb4786762129b7b1f090720a43
treeca8547d2251e7316cd970db4bc07af345dca3fe5tree | snapshot
parent885aae6860fae1eed38f5cc1ac09a40e4896a38ccommit | diff
ARM: dts: qcom: sdx55: Add support for A7 PLL clock

On SDX55 there is a separate A7 PLL which is used to provide high
frequency clock to the Cortex A7 CPU via a MUX.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210408170457.91409-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm/boot/dts/qcom-sdx55.dtsi diff | blob | history
Domain: System / Kernel;