drm/i915/icl: update ddb entry start/end mask during hw ddb readout
authorMahesh Kumar <mahesh1.kumar@intel.com>
Thu, 26 Apr 2018 14:25:17 +0000 (19:55 +0530)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Sat, 28 Apr 2018 00:11:56 +0000 (17:11 -0700)
commit37cde11ba720cc485bbc784e9a34878d40a34e96
tree85b2a9d5ddcb118baa866e0c10ef111ee0f164f2
parentaa9664ffe863f470efdbe40ea20ce96f2887ebcd
drm/i915/icl: update ddb entry start/end mask during hw ddb readout

Gen11/ICL onward ddb entry start/end mask is increased from 10 bits to
11 bits. This patch make changes to use proper mask for ICL+ during
hardware ddb value readout.

Changes since V1:
 - Use _MASK & _SHIFT macro (James)
Changes since V2:
 - use kernel type u8 instead of uint8_t
Changes since V3:
 - Rebase

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180426142517.16643-4-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c