[CodeGen] Print RegClasses on MI in verbose mode
authorFrancis Visoiu Mistrih <francisvm@yahoo.com>
Thu, 18 Jan 2018 17:59:06 +0000 (17:59 +0000)
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>
Thu, 18 Jan 2018 17:59:06 +0000 (17:59 +0000)
commit378b5f3de600ef68d856003454d0e9f3a818762f
treed51af27d91123c16c85791c4d59e1eab5c093aa1
parenta2d6fe4ab4823e56d01a7cde2cd5eed10f8da960
[CodeGen] Print RegClasses on MI in verbose mode

r322086 removed the trailing information describing reg classes for each
register.

This patch adds printing reg classes next to every register when
individual operands/instructions/basic blocks are printed. In the case
of dumping MIR or printing a full function, by default don't print it.

Differential Revision: https://reviews.llvm.org/D42239

llvm-svn: 322867
19 files changed:
llvm/include/llvm/CodeGen/MachineBasicBlock.h
llvm/include/llvm/CodeGen/MachineInstr.h
llvm/include/llvm/CodeGen/MachineOperand.h
llvm/lib/CodeGen/MIRPrinter.cpp
llvm/lib/CodeGen/MachineBasicBlock.cpp
llvm/lib/CodeGen/MachineFunction.cpp
llvm/lib/CodeGen/MachineInstr.cpp
llvm/lib/CodeGen/MachineOperand.cpp
llvm/lib/CodeGen/MachineOptimizationRemarkEmitter.cpp
llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
llvm/test/CodeGen/AArch64/arm64-misched-forwarding-A53.ll
llvm/test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
llvm/test/CodeGen/ARM/misched-int-basic-thumb2.mir
llvm/test/CodeGen/ARM/misched-int-basic.mir
llvm/test/CodeGen/ARM/single-issue-r52.mir
llvm/test/CodeGen/X86/GlobalISel/x86_64-fallback.ll
llvm/test/CodeGen/X86/misched-copy.ll
llvm/unittests/CodeGen/MachineOperandTest.cpp