scsi: hisi_sas: Add support for interrupt coalescing for v3 hw
authorXiang Chen <chenxiang66@hisilicon.com>
Fri, 9 Nov 2018 14:06:34 +0000 (22:06 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Thu, 15 Nov 2018 19:37:05 +0000 (14:37 -0500)
commit37359798ec44ae03fab383a9bef3b7c9df819063
tree8acd86e35b03bac13dcdca171df49f9957c2eb39
parent488cf558e3d7c95daf737d9cae165019ee3f2840
scsi: hisi_sas: Add support for interrupt coalescing for v3 hw

If INT_COAL_EN is enabled, configure time and count of interrupt
coalescing.  Then if CQ collects count of CQ entries in time, it will
report the interrupt. Or if CQ doesn't collect enough CQ entries in time,
it will report the interrupt at timeout.

As all the registers are not supported to be changed dynamically, we need
to config those register between disable and enable PHYs.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/hisi_sas/hisi_sas.h
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c