projects / platform / kernel / linux-starfive.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 53367bd) | patch
dt-bindings: clock: renesas: Document RZ/G2UL SoC
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 15 Mar 2022 14:29:15 +0000 (14:29 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 4 Apr 2022 08:58:46 +0000 (10:58 +0200)
commit3733db1f77130588c9a2c1596937294998bd7d27
tree6e9c1267d91db096b458faf1de2abce80d24a6c4tree | snapshot
parent53367bd28f3bf143355e66f20cb6cb83b70e9122commit | diff
dt-bindings: clock: renesas: Document RZ/G2UL SoC

Document the device tree binding for the Renesas RZ/G2UL Type-1
and Type-2 SoC. RZ/G2UL Type-2 has fewer clocks than RZ/G2UL Type-1
SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220315142915.17764-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml diff | blob | history
Domain: System / Kernel;