cxl/pci: Add some type-safety to the AER trace points
authorDan Williams <dan.j.williams@intel.com>
Tue, 6 Dec 2022 04:28:34 +0000 (20:28 -0800)
committerDan Williams <dan.j.williams@intel.com>
Tue, 6 Dec 2022 22:37:52 +0000 (14:37 -0800)
commit372ab3bc3711db46ae1205401c2aac2ed16fc348
tree340d9c7d16ea006c6155ca8c3a7169341e1a72ef
parent7fe898041fb0c8e630504ecc2cb8805651ac85c1
cxl/pci: Add some type-safety to the AER trace points

The first argument to the CXL AER trace points is the source device.
Pass a 'const struct device *' rather than a 'const char *' for more
type precision / safety.

Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/167030091477.4045167.15174636482098463885.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/pci.c
include/trace/events/cxl.h