bus: mhi: host: Wait for ready state after reset
authorJeffrey Hugo <quic_jhugo@quicinc.com>
Mon, 18 Apr 2022 17:22:42 +0000 (11:22 -0600)
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Sat, 23 Apr 2022 13:27:32 +0000 (18:57 +0530)
commit36e5505dfb42e86b25ded0a023dace6cff875cc3
treead83d0efe45ab921a9eb9300049136f4a99541b8
parent95c33ae41b822c37dc841cf80ca388fea376e36d
bus: mhi: host: Wait for ready state after reset

After the device has signaled the end of reset by clearing the reset bit,
it will automatically reinit MHI and the internal device structures.  Once
That is done, the device will signal it has entered the ready state.

Signaling the ready state involves sending an interrupt (MSI) to the host
which might cause IOMMU faults if it occurs at the wrong time.

If the controller is being powered down, and possibly removed, then the
reset flow would only wait for the end of reset.  At which point, the host
and device would start a race.  The host may complete its reset work, and
remove the interrupt handler, which would cause the interrupt to be
disabled in the IOMMU.  If that occurs before the device signals the ready
state, then the IOMMU will fault since it blocked an interrupt.  While
harmless, the fault would appear like a serious issue has occurred so let's
silence it by making sure the device hits the ready state before the host
completes its reset processing.

Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Reviewed-by: Hemant Kumar <quic_hemantk@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/1650302562-30964-1-git-send-email-quic_jhugo@quicinc.com
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
drivers/bus/mhi/host/pm.c