phy: rockchip-emmc: configure default output tap delay
authorBrian Norris <briannorris@chromium.org>
Mon, 20 Jun 2016 17:56:42 +0000 (10:56 -0700)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 25 Jul 2016 08:34:15 +0000 (10:34 +0200)
commit36b5d460261f16563f9196c49c936b3e17d237e3
tree649f80a4b0422946e2023d549fc6c49a6db02eb8
parentd74857720d41c58f74966b5d06ebfa9111a62c69
phy: rockchip-emmc: configure default output tap delay

The output tap delay controls helps maintain the hold requirements for
eMMC. The exact value is dependent on the SoC and other factors, though
it isn't really an exact science. But the default of 0 is not very good,
as it doesn't give the eMMC much hold time, so let's bump up to 4
(approx 90 degree phase?). If we need to configure this any further
(e.g., based on board or speed factors), we may need to consider a
device tree representation.

Suggested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/phy/phy-rockchip-emmc.c