clk: qoriq: add more divider clocks support
authorYuantian Tang <andy.tang@nxp.com>
Wed, 22 Nov 2017 01:40:53 +0000 (09:40 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 21 Dec 2017 23:57:28 +0000 (15:57 -0800)
commit36ab04671570fcd0e33868eba83f361d76c36bbf
tree545b657ecd4c004d8f3e1d63e4b1d76b696a7c2b
parent4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323
clk: qoriq: add more divider clocks support

More divider clocks are needed by IP. So enlarge the PLL divider
array to accommodate more divider clocks.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Documentation/devicetree/bindings/clock/qoriq-clock.txt
drivers/clk/clk-qoriq.c