arm64: cpuinfo: remove I-cache VIPT aliasing detection
authorWill Deacon <will.deacon@arm.com>
Fri, 10 Mar 2017 20:32:20 +0000 (20:32 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Mon, 20 Mar 2017 16:16:51 +0000 (16:16 +0000)
commit3689c75af2a3bc944826e6da663deee50c97d910
tree7832e0c0ba8bb513fde7d59cc3e461d0ea2841a8
parent97da3854c526d3a6ee05c849c96e48d21527606c
arm64: cpuinfo: remove I-cache VIPT aliasing detection

The CCSIDR_EL1.{NumSets,Associativity,LineSize} fields are only for use
in conjunction with set/way cache maintenance and are not guaranteed to
represent the actual microarchitectural features of a design.

The architecture explicitly states:

| You cannot make any inference about the actual sizes of caches based
| on these parameters.

We currently use these fields to determine whether or the I-cache is
aliasing, which is bogus and known to break on some platforms. Instead,
assume the I-cache is always aliasing if it advertises a VIPT policy.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/cachetype.h
arch/arm64/kernel/cpuinfo.c