[AMDGPU] Divergence driven instruction selection. Part 1.
authorAlexander Timofeev <Alexander.Timofeev@amd.com>
Fri, 21 Sep 2018 10:31:22 +0000 (10:31 +0000)
committerAlexander Timofeev <Alexander.Timofeev@amd.com>
Fri, 21 Sep 2018 10:31:22 +0000 (10:31 +0000)
commit36617f016090aaaa30370d06de76e3fe6a665072
tree28204d0d58544bb86a68f82fa30f1c3b115e65bf
parent8f7aab5c61c636a4870b2b9dd3a9e11deedd4ef6
[AMDGPU] Divergence driven instruction selection. Part 1.

    Summary: This change is the first part of the AMDGPU target description
    change. The aim of it is the effective splitting the vector and scalar
    flows at the selection stage. Selection uses predicate functions based
    on the framework implemented earlier - https://reviews.llvm.org/D35267

    Differential revision: https://reviews.llvm.org/D52019

    Reviewers: rampitec

llvm-svn: 342719
18 files changed:
llvm/lib/Target/AMDGPU/AMDGPU.td
llvm/lib/Target/AMDGPU/SIInstrInfo.td
llvm/lib/Target/AMDGPU/SIInstructions.td
llvm/lib/Target/AMDGPU/SOPInstructions.td
llvm/lib/Target/AMDGPU/VOP2Instructions.td
llvm/lib/Target/AMDGPU/VOPInstructions.td
llvm/test/CodeGen/AMDGPU/add.ll
llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
llvm/test/CodeGen/AMDGPU/ctpop64.ll
llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
llvm/test/CodeGen/AMDGPU/fabs.f16.ll
llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
llvm/test/CodeGen/AMDGPU/shift-i128.ll
llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
llvm/test/CodeGen/AMDGPU/sibling-call.ll
llvm/test/CodeGen/AMDGPU/sub.ll