projects / external / binutils.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: d9ccd46) | patch
RISC-V: Disassemble x0 based addresses as 0.
authorJim Wilson <jimw@sifive.com>
Wed, 10 Jan 2018 00:40:06 +0000 (16:40 -0800)
committerJim Wilson <jimw@sifive.com>
Wed, 10 Jan 2018 00:40:06 +0000 (16:40 -0800)
commit35fd2b2bcf370837a03f077acf1222f0a7e9c4d1
tree4c6fc1540f4073b297ddcb097539fce0f9f01a47tree | snapshot
parentd9ccd460fdbe0e0f3dd9263175aa4b23b207a51ecommit | diff
RISC-V: Disassemble x0 based addresses as 0.

gas/
* testsuite/gas/riscv/auipc-x0.d: New.
* testsuite/gas/riscv/auipc-x0.s: New.

opcodes/
* riscv-dis.c (maybe_print_address): If base_reg is zero,
then the hi_addr value is zero.
gas/ChangeLog diff | blob | history
gas/testsuite/gas/riscv/auipc-x0.d [new file with mode: 0644] blob
gas/testsuite/gas/riscv/auipc-x0.s [new file with mode: 0644] blob
opcodes/ChangeLog diff | blob | history
opcodes/riscv-dis.c diff | blob | history
Domain: System / Toolchain;