clk: sunxi-ng: mp: Adjust parent rate for pre-dividers
authorChen-Yu Tsai <wens@csie.org>
Tue, 14 Feb 2017 03:35:22 +0000 (11:35 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 30 Mar 2017 07:41:26 +0000 (09:41 +0200)
commit35ef543eb372811d9090cbc4de0d5f86e6d2f787
tree0b9d65887b2d32080c3f0a422d714ec716be299b
parent867f7804ce656bd8f55d74b4477dfd5e3213a805
clk: sunxi-ng: mp: Adjust parent rate for pre-dividers

commit ac8616e4c81dded650dfade49a7da283565d37ce upstream.

The MP style clocks support an mux with pre-dividers. While the driver
correctly accounted for them in the .determine_rate callback, it did
not in the .recalc_rate and .set_rate callbacks.

This means when calculating the factors in the .set_rate callback, they
would be off by a factor of the active pre-divider. Same goes for
reading back the clock rate after it is set.

Fixes: 2ab836db5097 ("clk: sunxi-ng: Add M-P factor clock support")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/clk/sunxi-ng/ccu_mp.c