Fixed DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT i1 handling
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Tue, 13 Nov 2018 20:26:27 +0000 (20:26 +0000)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Tue, 13 Nov 2018 20:26:27 +0000 (20:26 +0000)
commit35de877e8c3b6285c03987c6e89985ee3cdd30c0
tree15ade5393273d1bdd9fe4012c51ea0e219447bf5
parent0736461b249fdcd70b4e5d23de6ee8859ef1255d
Fixed DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT i1 handling

Legalizer used to request an ext load from i8 to i1 when promoting
vector element type to i8. Fixed.

Differential Revision: https://reviews.llvm.org/D54440

llvm-svn: 346795
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll [new file with mode: 0644]