clocksource/drivers/atcpit100: Add andestech atcpit100 timer
authorRick Chen <rickchen36@gmail.com>
Mon, 11 Dec 2017 07:53:15 +0000 (15:53 +0800)
committerGreentime Hu <greentime@andestech.com>
Thu, 22 Feb 2018 02:44:36 +0000 (10:44 +0800)
commit35dbb74aa752cff90e8dac1a24ed2a452aed0251
treeabc5f51bd1582b665b0b7ec5d8b180b61762ff66
parenteac8173e7b99b215a386391dc95f5e4d7e4d7085
clocksource/drivers/atcpit100: Add andestech atcpit100 timer

ATCPIT100 is often used on the Andes architecture,
This timer provide 4 PIT channels. Each PIT channel is a
multi-function timer, can be configured as 32,16,8 bit timers
or PWM as well.

For system timer it will set channel 1 32-bit timer0 as clock
source and count downwards until underflow and restart again.

It also set channel 0 32-bit timer0 as clock event and count
downwards until condition match. It will generate an interrupt
for handling periodically.

Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Add andestech atcpit100 timer
drivers/clocksource/Kconfig
drivers/clocksource/Makefile
drivers/clocksource/timer-atcpit100.c [new file with mode: 0644]