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[AArch64][Builtins] Avoid unnecessary cache cleaning
authorBryan Chan <bryan.chan@huawei.com>
Mon, 28 Oct 2019 13:52:28 +0000 (09:52 -0400)
committerBryan Chan <bryan.chan@huawei.com>
Mon, 28 Oct 2019 13:56:39 +0000 (09:56 -0400)
commit35cb3ee4ca477095bb3dd74f60ab932e185be63f
tree04147bc1da778233770e54354fdffce2ce1f58c3tree | snapshot
parentd2ec416c7babe65947ab841f9c9eb08844af3549commit | diff
[AArch64][Builtins] Avoid unnecessary cache cleaning

Use new control bits CTR_EL0.DIC and CTR_EL0.IDC to discover the d-cache
cleaning and i-cache invalidation requirements for instruction-to-data
coherence. This matches the behavior in the latest libgcc.

Author: Shaokun Zhang <zhangshaokun@hisilicon.com>

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D69247
compiler-rt/lib/builtins/clear_cache.c diff | blob | history
Domain: System / Toolchain;