drivers: net: cpsw: Fix TX_IN_SEL offset
authorJohn Ogness <john.ogness@linutronix.de>
Fri, 14 Nov 2014 14:42:52 +0000 (15:42 +0100)
committerDavid S. Miller <davem@davemloft.net>
Sun, 16 Nov 2014 19:20:00 +0000 (14:20 -0500)
commit35717d8d6fc6fc50692273d6667a0a575c26aa93
tree9ce75d4c7f6ec18ec261bedfd2466b09b2e48766
parent9f458945080f9e618641ff3ef04e60be0895d7e4
drivers: net: cpsw: Fix TX_IN_SEL offset

The TX_IN_SEL offset for the CPSW_PORT/TX_IN_CTL register was
incorrect. This caused the Dual MAC mode to never get set when
it should. It also caused possible unintentional setting of a
bit in the CPSW_PORT/TX_BLKS_REM register.

The purpose of setting the Dual MAC mode for this register is to:

    "... allow packets from both ethernet ports to be written into
     the FIFO without one port starving the other port."
- AM335x ARM TRM

Signed-off-by: John Ogness <john.ogness@linutronix.de>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/ti/cpsw.c