Support 128/256/512-bit vector plus/smin/smax reduction for _Float16.
authorliuhongt <hongtao.liu@intel.com>
Mon, 27 Sep 2021 06:57:38 +0000 (14:57 +0800)
committerliuhongt <hongtao.liu@intel.com>
Tue, 28 Sep 2021 01:40:30 +0000 (09:40 +0800)
commit3540429be7ad1085af83600483908b621078fb6f
tree36e89a1f9e29e2c2662a7f0e139cbb48979c8e83
parentcf966403d91afcf475347f0d06dd2b7215ae3611
Support 128/256/512-bit vector plus/smin/smax reduction for _Float16.

gcc/ChangeLog:

* config/i386/i386-expand.c (emit_reduc_half): Handle
V8HF/V16HF/V32HFmode.
* config/i386/sse.md (REDUC_SSE_PLUS_MODE): Add V8HF.
(REDUC_SSE_SMINMAX_MODE): Ditto.
(REDUC_PLUS_MODE): Add V16HF and V32HF.
(REDUC_SMINMAX_MODE): Ditto.

gcc/testsuite

* gcc.target/i386/avx512fp16-reduce-op-2.c: New test.
* gcc.target/i386/avx512fp16-reduce-op-3.c: New test.
gcc/config/i386/i386-expand.c
gcc/config/i386/sse.md
gcc/testsuite/gcc.target/i386/avx512fp16-reduce-op-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx512fp16-reduce-op-3.c [new file with mode: 0644]