clk: exynos-audss: add support for Exynos 5420
authorAndrew Bresticker <abrestic@chromium.org>
Wed, 25 Sep 2013 21:12:51 +0000 (14:12 -0700)
committerTomasz Figa <t.figa@samsung.com>
Wed, 8 Jan 2014 17:02:43 +0000 (18:02 +0100)
commit3538a2cf0e04ad69840d74f46f7f8af920d913b5
treef01c90bdb68d818038b67d06aee0a86e0c4b0247
parentc08ceea3a9d3276ec464e8b74573b1c58e93db7f
clk: exynos-audss: add support for Exynos 5420

The AudioSS block on Exynos 5420 has an additional clock gate for the
ADMA bus clock.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
drivers/clk/samsung/clk-exynos-audss.c
include/dt-bindings/clk/exynos-audss-clk.h