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[VE] Support convert instructions in MC layer
authorKazushi (Jam) Marukawa <marukawa@nec.com>
Wed, 10 Jun 2020 10:22:19 +0000 (12:22 +0200)
committerSimon Moll <simon.moll@emea.nec.com>
Wed, 10 Jun 2020 10:22:33 +0000 (12:22 +0200)
commit34fef0c980446c3ea9595328e0e525db222870f0
tree21b4e0264bf579bf004ad6a9fa2f55135fa354a5tree | snapshot
parenta4cf68e743eea0bc276efbe8de2fadb0caf12e3acommit | diff
[VE] Support convert instructions in MC layer

Summary:
Add CVTSQ/CVTDQ/CVTQD/CVTQS instructions.  Add regression tests for
them and other convert instructions of asmparser, mccodeemitter, and
disassembler.  In order to add those instructions, support RD operands
in asmparser, mccodeemitter, and disassembler.

Differential Revision: https://reviews.llvm.org/D81536
17 files changed:
llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp diff | blob | history
llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp diff | blob | history
llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp diff | blob | history
llvm/lib/Target/VE/VE.h diff | blob | history
llvm/lib/Target/VE/VEInstrInfo.td diff | blob | history
llvm/test/MC/VE/CVTDL.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTDQ.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTDS.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTDW.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTLD.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTQD.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTQS.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTSD.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTSQ.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTSW.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTWD.s [new file with mode: 0644] blob
llvm/test/MC/VE/CVTWS.s [new file with mode: 0644] blob
Domain: System / Toolchain;