drm/i915/dg2: DG2 has fixed memory bandwidth
authorMatt Roper <matthew.d.roper@intel.com>
Wed, 21 Jul 2021 22:30:43 +0000 (15:30 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Thu, 22 Jul 2021 16:31:52 +0000 (09:31 -0700)
commit34ba3c8a7d8ef378f4244f539978a95e38157aa6
treede4bc276006ec8f61d24d12c554c3592dcf700b5
parent5eb6bf0b44e7f21a2e6f4cdebdbb4ae9dd11f458
drm/i915/dg2: DG2 has fixed memory bandwidth

DG2 doesn't have a SAGV or QGV points that determine memory bandwidth.
Instead it has a constant amount of memory bandwidth available to
display that does not need to be reduced based on the number of active
planes.

For simplicity, we'll just modify driver initialization to create a
single dummy QGV point with the proper amount of memory bandwidth,
rather than trying to query the pcode for this information.

Bspec: 64631
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721223043.834562-19-matthew.d.roper@intel.com
drivers/gpu/drm/i915/display/intel_bw.c