clk: rockchip: fix wrong clock definitions for rk3328
authorJonas Karlman <jonas@kwiboo.se>
Sun, 10 Mar 2019 12:00:45 +0000 (12:00 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 25 May 2019 16:23:29 +0000 (18:23 +0200)
commit3487804cf6dcb5adde33d0d04d8820c5ddc4bd26
treea5dcaa25b54efa92c02e9cb6f9ada14d505d8fa8
parentfe082b99d57b12dd506d8506deeeb026820b7972
clk: rockchip: fix wrong clock definitions for rk3328

commit fb903392131a324a243c7731389277db1cd9f8df upstream.

This patch fixes definition of several clock gate and select register
that is wrong for rk3328 referring to the TRM and vendor kernel.
Also use correct number of softrst registers.

Fix clock definition for:
- clk_crypto
- aclk_h265
- pclk_h265
- aclk_h264
- hclk_h264
- aclk_axisram
- aclk_gmac
- aclk_usb3otg

Fixes: fe3511ad8a1c ("clk: rockchip: add clock controller for rk3328")
Cc: stable@vger.kernel.org
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/clk/rockchip/clk-rk3328.c