[ARM] Replace TransferImpOps with copyImplicitOps
authorJohn Brawn <john.brawn@arm.com>
Fri, 14 Jul 2023 12:49:33 +0000 (13:49 +0100)
committerJohn Brawn <john.brawn@arm.com>
Tue, 18 Jul 2023 13:01:04 +0000 (14:01 +0100)
commit343e204a52845dcd7bb7e7b8213513bcc33939c8
treef3d2982849c9f368fb252a15506dabb02b2bc73e
parent46aec7bc09472299c058bc8a64ef15e44c363933
[ARM] Replace TransferImpOps with copyImplicitOps

In most places where TransferImpOps is currently used we just have one
machine instruction, so it's doing the same thing as copyImplicitOps
anyway. In those cases where we have more than one machine
instruction the destination is written to in each instruction so any
implicit defs should appear on all of them (and we shouldn't see any
implicit refs as these pseudo-instruction don't have any register
inputs), meaning the current use of TransferImpOps is incorrect and
we should be using copyImplicitOps on all of the generated
instructions.

Differential Revision: https://reviews.llvm.org/D155301
llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
llvm/test/CodeGen/ARM/expand-pseudos.mir
llvm/test/CodeGen/Thumb2/expand-pseudos.mir [new file with mode: 0644]