ixgbe: Make queue pairs on single MSI-X interrupts
authorPJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>
Thu, 12 Nov 2009 23:50:43 +0000 (23:50 +0000)
committerDavid S. Miller <davem@davemloft.net>
Sat, 14 Nov 2009 04:46:55 +0000 (20:46 -0800)
commit342bde1b70c79bfc8509b017b3987f3c7541ff8e
treec3a9e2f2b15d864a360667c6f00a0dd2fe8e0c01
parent8a0717f30ce93a686d325122d8b0c6b73b32cfb3
ixgbe: Make queue pairs on single MSI-X interrupts

This patch pairs similar-numbered Rx and Tx queues onto a single
MSI-X vector.  For example, Tx queue 0 and Rx queue 0's interrupt
with be ethX-RxTx-0.  This allows for more efficient cleanup, since
fewer interrupts will be firing during device operation.  It also
helps with a cleaner CPU affinity for IRQ affinity.

Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ixgbe/ixgbe_main.c