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[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround
authorValentine Barshak <vbarshak@ru.mvista.com>
Fri, 21 Sep 2007 14:50:09 +0000 (00:50 +1000)
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>
Wed, 3 Oct 2007 12:20:18 +0000 (07:20 -0500)
commit340ffd267c85fc28da7cfd681b177c816af800cf
treeb9a757d6d0566420fe103c02d60f2b520e5c3880tree | snapshot
parent8112753bb2c0045398c89d0647792b39805f6d40commit | diff
[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround

Add a workaround for PowerPC 440EPx/GRx incorrect write to
DDR SDRAM errata. Data can be written to wrong address
in SDRAM when write pipelining enabled on plb0. We disable
it in the cpu_setup for these processors at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
arch/powerpc/kernel/cpu_setup_44x.S diff | blob | history
arch/powerpc/kernel/cputable.c diff | blob | history
Domain: System / Kernel;