[X86] Move X86DAGToDAGISel::matchBEXTRFromAnd() into X86ISelLowering
authorRoman Lebedev <lebedev.ri@gmail.com>
Wed, 10 Oct 2018 20:40:12 +0000 (20:40 +0000)
committerRoman Lebedev <lebedev.ri@gmail.com>
Wed, 10 Oct 2018 20:40:12 +0000 (20:40 +0000)
commit33d84c6dacf1d65e464108a5a0bec64d7b312f42
tree040ad1884374c0e1b0e2d6f55e665fafed8aedf0
parent58fc00d0bc1d33afbecfd7d83fb60529b7decb40
[X86] Move X86DAGToDAGISel::matchBEXTRFromAnd() into X86ISelLowering

Summary:
As discussed in [[ https://bugs.llvm.org/show_bug.cgi?id=38938 | PR38938 ]],
we fail to emit `BEXTR` if the mask is shifted.
We can't deal with that in `X86DAGToDAGISel` `before the address mode for the inc is selected`,
and we can't really do it in the normal DAGCombine, because we don't have generic `ISD::BitFieldExtract` node,
and if we simply turn the shifted mask into a normal mask + shift-left, it will be folded back.
So it would seem X86ISelLowering is the place to handle this.

This patch only moves the matchBEXTRFromAnd()
from X86DAGToDAGISel to X86ISelLowering.
It does not add support for the 'shifted mask' pattern.

Reviewers: RKSimon, craig.topper, spatel

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52426

llvm-svn: 344179
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/tbm_patterns.ll