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x86/mce: Update MCE severity condition check
authorChen Gong <gong.chen@linux.intel.com>
Thu, 20 Jun 2013 09:16:12 +0000 (05:16 -0400)
committerTony Luck <tony.luck@intel.com>
Thu, 27 Jun 2013 20:45:52 +0000 (13:45 -0700)
commit33d7885b594e169256daef652e8d3527b2298e75
tree03ba2d52d6a220c75f29c37557a2b7f9091ada55tree | snapshot
parent9e895ace5d82df8929b16f58e9f515f6d54ab82dcommit | diff
x86/mce: Update MCE severity condition check

Update some SRAR severity conditions check to make it clearer,
according to latest Intel SDM Vol 3(June 2013), table 15-20.

Signed-off-by: Chen Gong <gong.chen@linux.intel.com>
Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
arch/x86/kernel/cpu/mcheck/mce-severity.c diff | blob | history
Domain: System / Uncategorized;