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[AArch64] Explicitly use v1i64 type for llvm.aarch64.neon.abs.i64 .
authorEli Friedman <efriedma@codeaurora.org>
Tue, 15 Jan 2019 00:15:24 +0000 (00:15 +0000)
committerEli Friedman <efriedma@codeaurora.org>
Tue, 15 Jan 2019 00:15:24 +0000 (00:15 +0000)
commit33aecc81823ff2e7f790a2c0be4a36ef42869322
tree24104f3e1b97eb5b4d570b0d887492974e50e24dtree | snapshot
parentf3126c8bc5cd24608698a2d28856691f346e03b6commit | diff
[AArch64] Explicitly use v1i64 type for llvm.aarch64.neon.abs.i64 .

Otherwise, with D56544, the intrinsic will be expanded to an integer
csel, which is probably not what the user expected.  This matches the
general convention of using "v1" types to represent scalar integer
operations in vector registers.

While I'm here, also add some error checking so we don't generate
illegal ABS nodes.

Differential Revision: https://reviews.llvm.org/D56616

llvm-svn: 351141
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/AArch64/arm64-vabs.ll diff | blob | history
Domain: System / Toolchain;