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(parent: 193be3f) | patch
drm/i915/guc: Add DG2 registers for GuC error state capture.
authorAlan Previn <alan.previn.teres.alexis@intel.com>
Mon, 21 Mar 2022 16:45:18 +0000 (09:45 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 22 Mar 2022 17:33:30 +0000 (10:33 -0700)
commit33a220f6fcfc7fd9819f96aac69356593a63b10f
tree65687641cc22695b39078453d0d376f08478bbcftree | snapshot
parent193be3f448ca75f9bfd36a7b489201f3572a8b49commit | diff
drm/i915/guc: Add DG2 registers for GuC error state capture.

Add additional DG2 registers for GuC error state capture.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220321164527.2500062-5-alan.previn.teres.alexis@intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c diff | blob | history
Domain: System / Kernel;