RISC-V: NaN-box FP values smaller than an FP register.
authorJim Wilson <jimw@sifive.com>
Mon, 22 Oct 2018 21:11:55 +0000 (14:11 -0700)
committerJim Wilson <jimw@sifive.com>
Mon, 22 Oct 2018 21:11:55 +0000 (14:11 -0700)
commit3399f1b3030c3419859f1230bc66a981154d176d
treeb7d536584900106fdb6de5d02adc331ac8b48c1e
parent270b9329b713fdc166f95dfa3a0a2f72f3a49608
RISC-V: NaN-box FP values smaller than an FP register.

The hardware requires that values in FP registers be NaN-boxed, so we must
extend them with 1's instead of 0's as we do for integer values.

gdb/
* riscv-tdep.c (riscv_push_dummy_call) <in_reg>: Check for value in
FP reg smaller than FP reg size, and fill with -1 instead of 0.
gdb/ChangeLog
gdb/riscv-tdep.c