perf/x86: Allow for 8<num_fixed_counters<16
authorColin Ian King <colin.king@canonical.com>
Tue, 20 Apr 2021 14:29:07 +0000 (15:29 +0100)
committerPeter Zijlstra <peterz@infradead.org>
Fri, 23 Apr 2021 07:03:15 +0000 (09:03 +0200)
commit32d35c4a96ec79446f0d7be308a6eb248b507a0b
treedc4f860f1d72b99aa639e93676ae258a15b44d30
parent6a5f4386798d81f7f413e93c87e2b6de7439beea
perf/x86: Allow for 8<num_fixed_counters<16

The 64 bit value read from MSR_ARCH_PERFMON_FIXED_CTR_CTRL is being
bit-wise masked with the value (0x03 << i*4). However, the shifted value
is evaluated using 32 bit arithmetic, so will UB when i > 8. Fix this
by making 0x03 a ULL so that the shift is performed using 64 bit
arithmetic.

This makes the arithmetic internally consistent and preparers for the
day when hardware provides 8<num_fixed_counters<16.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20210420142907.382417-1-colin.king@canonical.com
arch/x86/events/core.c