phy: ti-pipe3: Use TRM recommended settings for SATA DPLL
authorRoger Quadros <rogerq@ti.com>
Mon, 7 Aug 2017 09:11:02 +0000 (12:11 +0300)
committerKishon Vijay Abraham I <kishon@ti.com>
Sun, 20 Aug 2017 08:29:47 +0000 (13:59 +0530)
commit325ce0fe58992b67edea103339e00b028e38e40e
tree5a77fe43d9e4e0b61a3e8d366af5b746cf4cec16
parent8387c576b713bf677d59b7f16be64adb6b2de660
phy: ti-pipe3: Use TRM recommended settings for SATA DPLL

The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.

Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.

[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf

Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: add exact TRM version to commit text]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/ti/phy-ti-pipe3.c