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drm/i915/dsb: Align DSB register writes to 8 bytes
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 16 Dec 2022 00:38:00 +0000 (02:38 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 13 Jan 2023 14:48:03 +0000 (16:48 +0200)
commit3229319e446cafe51e8d3060bdf39203b95a5c98
tree5cec2b6eb5d29e540d3d61ea11e47748fa4789f1tree | snapshot
parentf9e2ada6fed6f0067b1d7380f960bc02dcc8acd2commit | diff
drm/i915/dsb: Align DSB register writes to 8 bytes

Every DSB instruction has to be 8byte aligned. Make sure
that is the case for the non-indexed register writes as well.
The way this could end up unaligned is we emitted an odd
number of indexed register writes beforehand.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221216003810.13338-4-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
drivers/gpu/drm/i915/display/intel_dsb.c diff | blob | history
Domain: System / Kernel;