dmaengine: dw-edma: Improve the linked list and data blocks definition
authorGustavo Pimentel <Gustavo.Pimentel@synopsys.com>
Thu, 18 Feb 2021 19:04:03 +0000 (20:04 +0100)
committerVinod Koul <vkoul@kernel.org>
Tue, 16 Mar 2021 17:28:53 +0000 (22:58 +0530)
commit31fb8c1ff962d93ed5025f39a6a186207c9805eb
tree6e99567ec3f6a9305de3eaa68a7959a2dd8f9d85
parentf3167dc16378da4abd4ca19d6700170fcdfd5be7
dmaengine: dw-edma: Improve the linked list and data blocks definition

In the previous implementation, the driver assumed that there existed
only two memory spaces that would equally distribute the amount of
read/write channels.

This might not be the case on some other implementations, therefore this
patch change this requirement so that each write/read channel has
its own linked list and data space well defined, which allows
different sizes and locations.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Link: https://lore.kernel.org/r/2e316cb983f8a1e09ce929029f87619dc92a52de.1613674948.git.gustavo.pimentel@synopsys.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/dw-edma/dw-edma-core.c
drivers/dma/dw-edma/dw-edma-core.h
drivers/dma/dw-edma/dw-edma-pcie.c