RISC-V: Fix supporting data type according to RVV ISA. [PR109479]

RISC-V: Fix supporting data type according to RVV ISA. [PR109479]

For vint64m*_t, we should only allow them in zve64* instead of zve32*_zvl64b (>=64b).
Ideally, we should make error message more friendly like Clang.
https://godbolt.org/z/f9GMv4dMo to report the RVV type require extenstion name.
However, I failed to find a way to do that. So current GCC can only report "unknown" type.
And I added comments to remind us doing this in the future.

gcc/ChangeLog:

	PR target/109479
	* config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
	(vint16mf4_t): Ditto.
	(vint32mf2_t): Ditto.
	(vint64m1_t): Ditto.
	(vint64m2_t): Ditto.
	(vint64m4_t): Ditto.
	(vint64m8_t): Ditto.
	(vuint8mf8_t): Ditto.
	(vuint16mf4_t): Ditto.
	(vuint32mf2_t): Ditto.
	(vuint64m1_t): Ditto.
	(vuint64m2_t): Ditto.
	(vuint64m4_t): Ditto.
	(vuint64m8_t): Ditto.
	(vfloat32mf2_t): Ditto.
	(vbool64_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
	(register_vector_type): Ditto.
	(check_required_extensions): Fix condition.
	* config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
	(RVV_REQUIRE_ELEN_64): New define.
	(RVV_REQUIRE_MIN_VLEN_64): Ditto.
	* config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
	(TARGET_VECTOR_FP64): Ditto.
	(ENTRY): Fix predicate.
	* config/riscv/vector-iterators.md: Fix predicate.

gcc/testsuite/ChangeLog:

	PR target/109479
	* gcc.target/riscv/rvv/base/pr109479-1.c: New test.
	* gcc.target/riscv/rvv/base/pr109479-2.c: New test.
	* gcc.target/riscv/rvv/base/pr109479-3.c: New test.
	* gcc.target/riscv/rvv/base/pr109479-4.c: New test.
	* gcc.target/riscv/rvv/base/pr109479-5.c: New test.
	* gcc.target/riscv/rvv/base/pr109479-6.c: New test.