Add the PPC64 ldbrx/stdbrx instructions
authorHal Finkel <hfinkel@anl.gov>
Thu, 28 Mar 2013 19:25:55 +0000 (19:25 +0000)
committerHal Finkel <hfinkel@anl.gov>
Thu, 28 Mar 2013 19:25:55 +0000 (19:25 +0000)
commit31d2956510b8484373fe244547b4f811430a28ff
tree8bdb71b918d6c0746149c1e7a9158abd3a15243b
parent772cf466dab6beadf3cab40722cf6cf10342f808
Add the PPC64 ldbrx/stdbrx instructions

These are 64-bit load/store with byte-swap, and available on the P7 and the A2.
Like the similar instructions for 16- and 32-bit words, these are matched in the
target DAG-combine phase against load/store-bswap pairs.

llvm-svn: 178276
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
llvm/test/CodeGen/PowerPC/bswap-load-store.ll