projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 1721404) | patch
[RISCV] Pass the destination register to getVLENFactoredAmount instead of returning...
authorCraig Topper <craig.topper@sifive.com>
Mon, 3 Oct 2022 17:59:35 +0000 (10:59 -0700)
committerCraig Topper <craig.topper@sifive.com>
Mon, 3 Oct 2022 17:59:35 +0000 (10:59 -0700)
commit31bca38ad1ca9e71b0be3e6910443704040e734d
tree362da7d703cec3290efdadd1b812e0bcb4ba260atree | snapshot
parent1721404b542a7eb120c2aa64c80cb83463291bcdcommit | diff
[RISCV] Pass the destination register to getVLENFactoredAmount instead of returning it. NFC

This is a refactor for another patch. For now we move the vreg
creation to the caller.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D135008
llvm/lib/Target/RISCV/RISCVFrameLowering.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfo.h diff | blob | history
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp diff | blob | history
Domain: System / Toolchain;