GlobalISel: Implement fewerElementsVector for G_CONCAT_VECTORS sources
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 3 Aug 2020 18:13:38 +0000 (14:13 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 19 Aug 2020 22:53:24 +0000 (18:53 -0400)
commit31adc28d24b1a95bb47df23068b6f61dfb5cd012
treec2973e1885ab6c0f51d76bbad4b83da4f77c8368
parentc1c1bed5d0828f1905f1e9a09a32c02f05de9b41
GlobalISel: Implement fewerElementsVector for G_CONCAT_VECTORS sources

This fixes <6 x s16> = G_CONCAT_VECTORS from <3 x s16> handling.
16 files changed:
llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir