drm/atmel-hlcdc: prefer a higher rate clock as pixel-clock base
authorPeter Rosin <peda@axentia.se>
Fri, 24 Aug 2018 09:24:57 +0000 (11:24 +0200)
committerBoris Brezillon <boris.brezillon@bootlin.com>
Mon, 27 Aug 2018 19:12:16 +0000 (21:12 +0200)
commit319711f982084b044d3dac6ae58e3d801ae4ca43
tree6951c63c46b7ba9cb3d30430fe93ecd11d6e1c8b
parentbf1178c9893018b77c829215970cf4c6a3cebb34
drm/atmel-hlcdc: prefer a higher rate clock as pixel-clock base

If the divider used to get the pixel-clock is small, the granularity
of the frequencies possible for the pixel-clock is quite coarse. E.g.
requesting a pixel-clock of 65MHz with a sys_clk of 132MHz results
in the divider being set to 3 ending up with 44MHz.

By preferring the doubled sys_clk as base, the divider instead ends
up as 5 yielding a pixel-clock of 52.8Mhz, which is a definite
improvement.

While at it, clamp the divider so that it does not overflow in case
it gets big.

Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180824092458.13165-2-peda@axentia.se
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c