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(parent: 2ce0b21) | patch
drm/amd/display: Updates SubVP and SubVP DRR cases
authorAlvin Lee <Alvin.Lee2@amd.com>
Tue, 12 Jul 2022 19:49:19 +0000 (15:49 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 25 Jul 2022 21:15:06 +0000 (17:15 -0400)
commit319568d75f5f91cd4f362b26e65af2a4437c64bf
treef7ef914ccd7b3b3dec4851da19faff8dceb43a37tree | snapshot
parent2ce0b2186c057a54a4d980b296bd1659d0091716commit | diff
drm/amd/display: Updates SubVP and SubVP DRR cases

[Description]
- For any DRR cases in SubVP, don't lock for VSYNC flips
- For DCN32/321 use FW to do DRR manual trigger programming
- Add bit in SubVP cmd to indicate if the SubVP pipe is DRR

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c diff | blob | history
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c diff | blob | history
Domain: System / Kernel;