ASoC: qcom: Fix incorrect volatile registers
authorSrinivasa Rao Mandadapu <srivasam@codeaurora.org>
Thu, 17 Dec 2020 08:08:33 +0000 (13:38 +0530)
committerMark Brown <broonie@kernel.org>
Thu, 17 Dec 2020 14:24:40 +0000 (14:24 +0000)
commit315fbe4cef98ee5fb6085bc54c7f25eb06466c70
treebc4fc065e6219b8c72a73d579d94934628a1588e
parent13733775326ea9eb81c6148ad60c43b8d231a343
ASoC: qcom: Fix incorrect volatile registers

MI2S and DMA control registers are not volatile, so remove these from volatile registers list.
Registers reset state check by reading non volatile registers makes no use,
so remove error check from cpu and platform trigger callbacks.
Initialized map variable two times in lpass platform trigger API,
so remove redundant initialization.

Fixes commit b1824968221cc ("ASoC: qcom: Fix enabling BCLK and LRCLK in LPAIF invalid state")

Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Link: https://lore.kernel.org/r/1608192514-29695-2-git-send-email-srivasam@codeaurora.org
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/qcom/lpass-cpu.c
sound/soc/qcom/lpass-platform.c