arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
authorDinh Nguyen <dinguyen@kernel.org>
Fri, 16 Sep 2022 01:45:37 +0000 (20:45 -0500)
committerDinh Nguyen <dinguyen@kernel.org>
Fri, 18 Nov 2022 17:13:49 +0000 (11:13 -0600)
commit31354121bf03dac6498a4236928a38490745d601
treee83efb74aa6e0753f70752d08434cd1ba672aab2
parent3b500ff37ce3ef5d7fbb731d082ef8f4cddce0f1
arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node

The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts